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surveys:synthesis [2011/04/19 16:54]
jobstman
surveys:synthesis [2011/04/19 17:07] (current)
jobstman
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      * parser generators (YACC)      * parser generators (YACC)
      * generator for statistical analyzers (AutoBayes Synthesis System, Johann M. Schumann, NASA - Moffett Field)      * generator for statistical analyzers (AutoBayes Synthesis System, Johann M. Schumann, NASA - Moffett Field)
-     * Matlab Simulink from MathWorks (based on a synchronous dataflow language, ​generated ​C/C++ code) +     * Matlab Simulink from MathWorks (based on a synchronous dataflow language, ​generates ​C/C++ code) 
-     * SCADE Suite from Esterel Technologies (Systems are described using a synchronous language, ​generate ​C/C++ code)+     * SCADE Suite from Esterel Technologies (Systems are described using a synchronous language, ​generates ​C/C++ code)
      * Bluespec compiler (HDL based on rules, each rule is executed automatically,​ designs have no explicit clock, generates Verilog code)  ​      * Bluespec compiler (HDL based on rules, each rule is executed automatically,​ designs have no explicit clock, generates Verilog code)  ​
      * BIP compiler (Systems are describe using extended automata and synchronization constructs, generates C/C++ code)      * BIP compiler (Systems are describe using extended automata and synchronization constructs, generates C/C++ code)
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 **Motivation.** ​ **Motivation.** ​
-A solution to this problem would allow augmenting the current programming style, which is mostly imperative, with a declarative,​ logical style. ​ This is particularly beneficial for systems in which concurrency plays an important role.....+A solution to this problem would allow augmenting the current programming style, which is mostly imperative, with a declarative,​ logical style. ​ This is particularly beneficial for systems in which concurrency plays an important role.
  
 In this area approaches can be split into three groups: In this area approaches can be split into three groups: